Presentation
NeuCore: A Novel Neuromorphic Processor Architecture with On-chip Event-driven Learning
DescriptionNeuromorphic computing has gained wildly attention these years because of its advantages of low power consumption and high energy efffciency. As a biologically credible unsupervised learning rule, Spike Timing Dependent Plasticity (STDP) uses the spike information between pre-synaptic and post-synaptic neurons to update the synaptic weights. Existing neuromorphic architectures with event-driven STDP on-chip learning can be divided into two categories, the trace-based ones and the counter-based ones. However, resource-friendly and fully event-based STDP on-chip learning is still not achieved. In this paper, we propose a novel resourcefriendly neuromorphic processor architecture named "NeuCore" with fully event-driven on-chip STDP learning. Combining the advantages of both trace-based and counter-based event-driven STDP on-chip learning architectures,several key techniquessuch asspikedriven updating of trace and weight are proposed and well-scheduled to further improve the energy efffciency and implementation efffciency of on-chip learning. TTe experimental results show that the accuracy of NeuCore reaches 96.0% and 90.04% on N-MNIST and DVS128 Gesture datasets. NeuCore achieves 4.44× and 2.5× speed up in performance and learning throughputrespectively when compared with the state-of-the-art trace-based work.NeuCore achieves 1.37× - 2.27× implementation efffciency when compared with the state-of-the-art counter-based work.
Event Type
Work-in-Progress Poster
TimeTuesday, June 256:00pm - 7:00pm PDT
LocationLevel 2 Lobby
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