Presentation
MAM-CIM: Data Resilience Scheduling Based Multilevel Analog Memory for Near Sensor Computing-In-Memory Architecture
DescriptionComputing-In-Memory (CIM) is considered as a promising solution to address the von-Neumann bottleneck. However, in traditional CIM architecture, data conversion could take up most of hardware resources, such as chip area and energy. To overcome previous design limitations, this work, named MAM-CIM, proposes a computational architecture utilizing multilevel analog memory, tailored for near-sensor computation of time domain data. At the same time, employing scheduling techniques to conduct data resilience analysis for analog memory contributes to additional reductions in hardware overhead. A generic recurrent unit (GRU) network is implemented based on the proposed architecture for real-time keyword spotting (KWS) application with TSMC 180nm technology. The evaluation results indicate that it achieves an accuracy of 88.51% for 10 keywords and the memory area of the system is saved by 21.11%.
Event Type
Work-in-Progress Poster
TimeWednesday, June 265:00pm - 6:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security