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Organization

Beihang University
Contributors
Jinyu Bai
Song Bian
kaihua cao
Youxiang Chen
Yuhao Chen
Yuanqing Cheng
Zhenxing Dou
Cenlin Duan
Zhengkun Gu
Xiaoyu Guo
Xiaolin He
LI hongge
Chunming Hu
Yuanqi Hu
Weiliang Huang
Yicheng Huang
Xiaotao Jia
Wang Kang
Yage Lin
Yanfang Liu
Yuhao Liu
Xidi Ma
Kelin Peng
Yingjie Qi
Tong Qiao
Yinjie Song
Jinkai Wang
Mingyue Wang
Peng Wang
Xueyan Wang
Yikun Wang
Yiou Wang
Zekun Wang
Zhaohao Wang
Yuntao Wei
Jianlei Yang
Shunchuan Yang
Yuan Yao
Bojun Zhang
Ce Zhang
He Zhang
Weichen Zhang
Youguang Zhang
Yue Zhang
Weisheng Zhao
Ao Zhou
Xinyu Zhu
Presentations
Research Manuscript
A Combined Content Addressable Memory and In-Memory Processing Approach for k-Clique Counting Acceleration
Embedded Systems
Embedded Memory and Storage Systems
Research Manuscript
Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption
Security
Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
BNN-YEO: an efficient Bayesian Neural Network for yield estimation and optimization
Design
Design for Manufacturability and Reliability
Research Manuscript
Every Failure Is A Lesson: Utilizing All Failure Samples To Deliver Tuning-Free Efficient Yield Evaluation
EDA
Physical Design and Verification
Work-in-Progress Poster
FEI: Fusion Processing of Sensing Energy and Information for Self-sustainable Infrared Smart Vision System
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
FRM-CIM: Full-Digital Recursive MAC Computing in Memory System Based on MRAM for Neural Network Applications
Design
In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
GNNavigator: Towards Adaptive Training of Graph Neural Networks via Automatic Guideline Exploration
AI
AI/ML Algorithms
Research Manuscript
Graph Neural Networks Automated Design and Deployment on Device-Edge Co-Inference Systems
AI
AI/ML Algorithms
Work-in-Progress Poster
Hybrid Stochastic Computing of Linear Time O(N) and Its In-Memory Computing for High Performances
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
KATO: Knowledge Alignment And Transfer for Transistor Sizing Of Different Design and Technology
EDA
Analog CAD, Simulation, Verification and Test
Work-in-Progress Poster
MAM-CIM: Data Resilience Scheduling Based Multilevel Analog Memory for Near Sensor Computing-In-Memory Architecture
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security
Research Manuscript
MAUnet: Multiscale Attention U-Net for Effective IR Drop Prediction
EDA
Timing and Power Analysis and Optimization
Research Manuscript
PPGNN: Fast and Accurate Privacy-Preserving Graph Neural Network Inference via Parallel and Pipelined Arithmetic-and-Logic FHE Accelerator
Security
Hardware Security: Primitives, Architecture, Design & Test
Research Manuscript
Series-Parallel Hybrid SOT-MRAM Computing-in-Memory Macro with Multi-Method Modulation for High Area and Energy Efficiency
Design
In-memory and Near-memory Computing Circuits
Research Manuscript
Towards Efficient SRAM-PIM Architecture Design by Exploiting Unstructured Bit-Level Sparsity
Design
In-memory and Near-memory Computing Architectures, Applications and Systems
Research Manuscript
WinoGen: A Highly Configurable Winograd Convolution IP Generator for Efficient CNN Acceleration on FPGA
Design
SoC, Heterogeneous, and Reconfigurable Architectures