Presentation
GL0AM: GPU Logic Simulation Using 0-Delay and Re-simulation Acceleration Method
DescriptionWe present GL0AM, a GPU-accelerated logic simulator that performs delay-annotated gate-level simulation, supporting a wide range of sequential gate types and simulation scenarios, including SRAMs. We propose a methodology to perform the simulation in 2 portions to increase parallelism in the application, where the first portion performs 0-delay cycle-simulation, and the second performs re-simulation. We use netlist graph partitioning to minimize synchronization overhead during the 0-delay simulation to increase speedup for this difficult to parallelize simulation process. GL0AM achieves simulation speedup of 15-448X when compared to a commercial simulator across a diverse set of benchmarks, which we aim to open-source.
Event Type
Work-in-Progress Poster
TimeWednesday, June 265:00pm - 6:00pm PDT
LocationLevel 2 Lobby
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