Presentation
OTPlace-Vias: A Novel Optimal Transport Based Method for High Density Vias Placement in 3D Circuits
DescriptionThree-dimensional integrated circuit (3D IC) is an important manufacturing technology. In particular, the Monolithic 3D (M3D) technology stands out as a cutting-edge approach that provides higher integration density. However, M3D also introduces several challenges in terms of high density and computational complexity. In this paper, we propose a new approach for solving the inter-tier vias placement problem through optimal transport, which can be efficiently implemented in parallel with GPUs and consequently achieves significant speedup. Moreover, comparing with previous methods, our approach can also facilitate the processing of high integration density circuits to be more effective.
Event Type
Research Manuscript
TimeWednesday, June 264:30pm - 4:45pm PDT
Location3008, 3rd Floor
EDA
Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package