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Research Manuscript: Silicon Stairways: Climbing the Layers of 3D IC Innovation
Session Chairs
Furkan Eris
Boston University
Nader Sehatbakhsh
University of California, Los Angeles
DescriptionThis session converges on the forefront of semiconductor technology, highlighting revolutionary approaches in chip design that blend optical networking, artificial intelligence, and sustainability. It further unravels the intricate world of 3D integrated circuit (IC) design, focusing on innovative strategies for power distribution, via placement, and routing efficiency.
Event TypeResearch Manuscript
TimeWednesday, June 263:30pm - 5:30pm PDT
Location3008, 3rd Floor
Topics
EDA
Keywords
Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package
Presentations
3:30pm - 3:45pm PDTExplainable Fuzzy Neural Network with Multi-Fidelity Reinforcement Learning for Micro-Architecture Design Space Exploration
Authors
Hanwei FAN
Ya Wang
Sicheng Li
Tingyuan Liang
Wei Zhang
3:45pm - 4:00pm PDTA High Level Approach to Co-Designing 3D ICs
Authors
Daniel Xing
Ankur Srivastava
4:00pm - 4:15pm PDTMulti-Resonance Mesh-Based Wavelength-Routed Optical Networks-on-Chip
Authors
Zhidan Zheng
Liaoyuan Cheng
Kanta Arisawa
Qingyu Li
Alexandre Truppel
Shigeru Yamashita
Tsun-Ming Tseng
Ulf Schlichtmann
4:15pm - 4:30pm PDTRedistribution Layer Routing with Dynamic Via Insertion Under Irregular Via Structure
Authors
Je-Wei Chuang
Zong-Han Wu
Bo-Ying Huang
Yao-Wen Chang
4:30pm - 4:45pm PDTOTPlace-Vias: A Novel Optimal Transport Based Method for High Density Vias Placement in 3D Circuits
Authors
Lin Chen
Qi Xu
Hu Ding
4:45pm - 5:00pm PDTVoronoi Diagram-based Multiple Power Plane Generation on Redistribution Layers in 3D ICs
Authors
Chia-Wei Lin
Jing-Yao Weng
I-Te Lin
Ho-Chieh Hsu
Chia-Ming Liu
Mark Po-Hung Lin
5:00pm - 5:15pm PDTThermal Resistance Network Derivative (TREND) Model for Efficient Thermal Simulation and Design of ICs and Packages
Authors
Shunxiang Lan
Min Tang
Liang Chen
Junfa Mao
5:15pm - 5:30pm PDT3D-Carbon: An Analytical Carbon Modeling Tool for 3D and 2.5D Integrated Circuits
Authors
Yujie Zhao
Yang (Katie) Zhao
Cheng Wan
Yingyan (Celine) Lin