Presentation
Redistribution Layer Routing with Dynamic Via Insertion Under Irregular Via Structure
DescriptionIn modern advanced packaging, redistribution layers (RDLs) are often used for signal transmission among chips, and vias are used for communication among different layers. Most existing RDL routers perform via planning before routing. However, since vias can be placed at arbitrary locations under the irregular via structure, via planning limits the solution space and reduces layout flexibility. This paper proposes a new flow with a novel routing graph model for 90- and 135-degree routing, which allows dynamic via insertion during routing. The proposed algorithm enlarges the solution space by providing more choices during path-finding, achieving higher routing quality. The experimental results based on commonly used benchmark suites show that our router achieves over 10\% better wirelength with over 29X speedup over the state-of-the-art work and even achieves 0.4\% better wirelength with 55X speedup over the state-of-the-art any-angle router.
Event Type
Research Manuscript
TimeWednesday, June 264:15pm - 4:30pm PDT
Location3008, 3rd Floor
EDA
Design Methodologies for System-on-Chip and 3D/2.5D System-in-Package