Session
Powering the Future: From Modeling, Simulation to Prediction
Session Chairs
DescriptionWith semiconductor scaling continuing, the efficiency of power prediction, simulation, and modeling becomes crucial. This session brings to light the synergy between neural networks in power prediction and cutting-edge simulations for power grid analysis, alongside specialized modeling for glitch and flip-flop optimization. From PowPrediCT's circuit-aware predictions to MAUnet's IR drop insights, and from PowerRChol's simulation advancements to innovative glitch and flip-flop modeling, this session explores the integral technologies setting new benchmarks for power efficiency in the ever-evolving semiconductor landscape.
Event TypeResearch Manuscript
TimeWednesday, June 261:30pm - 3:00pm PDT
Location3010, 3rd Floor
EDA
Timing and Power Analysis and Optimization
Presentations
| 1:30pm - 1:45pm PDT | Advanced gate-level glitch modeling using ANNs | |
| 1:45pm - 2:00pm PDT | Binding Multi-bit Flip-flop Cells through Design and Technology Co-optimization | |
| 2:00pm - 2:15pm PDT | MAUnet: Multiscale Attention U-Net for Effective IR Drop Prediction | |
| 2:15pm - 2:30pm PDT | PowerRChol: Efficient Power Grid Analysis Based on Fast Randomized Cholesky Factorization | |
| 2:30pm - 2:45pm PDT | PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning | |
| 2:45pm - 3:00pm PDT | Nona: Accurate Power Prediction Model Using Neural Networks |