Presentation
PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning
DescriptionAccurate and efficient power analysis at early VLSI design stages is critical for effective power optimization. It is a promising yet challenging task, especially during placement stage with the clock tree and final signal routing unavailable. Additionally, optimization-induced circuit transformations like circuit restructuring and gate sizing can invalidate fine-grained power supervision. Addressing these, we introduce the first generalizable circuit-transformation-aware power prediction model at placement stage. Compared to the cutting-edge commercial IC engine Innovus, we have significantly reduced the cross-stage power analysis error between placement and detailed routing.
Event Type
Research Manuscript
TimeWednesday, June 262:30pm - 2:45pm PDT
Location3010, 3rd Floor
EDA
Timing and Power Analysis and Optimization