Close

Presenter

Harshit Jaiswal
Cadence Design Systems, Inc.
Biography
11 years of experience in semiconductor industry. At present, working as a principal support application engineer at Cadence Design Systems Inc. and providing focus support to the tier-1 customer. Have a proven track record of fast learning, on time delivery through collaboration and leadership, and on integrating with cross functional and global teams.
Presentations
Back-End Design
An effective Hierarchical STA solution for closing Large SoC Design
Back-End Design
Design
Engineering Tracks
Back-End Design
Timing Robustness: A Way forward for analyzing timing-voltage sensitive paths for accounting IR-Drop Variations
Back-End Design
Design
Engineering Tracks