Presentation
Plug-n-Play Testbench environment for ARM Coresight SoC-400
DescriptionThe Coresight architecture is an integral part of any processor based design. ARM CoreSight architecture is a solution for debug and trace of complex SoCs. It provides a set of standard interfaces and programmer model views enabling partners to define CoreSight components and integrate them within the CoreSight architecture. SOC DV efforts will be increased to setup the verification stimulus whenever the ARM architecture changes. Automated Verification testbench is one of the best solutions to ease the DV efforts for Coresight related test sequences. This paper talks about generic parameterized automated SOC DV environment, which helps us in accelerating the DV bring-up and reduce the time of verification cycle. The plug-n-play testbench supports various ARM architecture base Coresight system. There is very minimal manual intervention and only a few user inputs are required to implement the verification testbench for targeted SOC. The testbench can be plugged in for verifying the debug data path in SoC design and to close the verification early than the project deadline.
Event Type
Engineering Track Poster
TimeTuesday, June 255:41pm - 5:42pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP