Presentation
Early Validation of Random TB using Formal Technology
DescriptionFunctional Coverage serves as a metric for measuring the completeness of verification efforts, often requiring a significant time investment. The testbench (TB) employed to achieve verification coverage may involve complex constraints and incomplete scenarios, potentially causing issues of over-constraint or under-constraint due to its randomized nature. Such flawed or incomplete random TBs can lead to unnecessary time and effort spent on checking UNR or re-running regressions after a verification engineer's review. This paper presents a methodology for validating TBs under a simulation environment using Formal Technology to mitigate the existing validation Turnaround Time (TAT). Leveraging Formal Technology and C2A(Constraint to Assume) developed internally, constraint and coverage model in random simulation TB can be verified early to eliminate over/under-constraints. Furthermore, additional functional coverage can be generated by applying internally developed R2C(RTL to Coverage) and C2C(Counter to Coverage) to the RTL. As a result, The improved TB can be applied to the simulator from the early stages, confirming a reduction in validation TAT. This approach facilitates the creation of high-quality coverage-based TBs and helps the early detection of hard-to-find bugs in a simulator-based environment.
Event Type
Engineering Track Poster
TimeTuesday, June 255:01pm - 5:02pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP