Presentation
Future Proofing Chiplet Testbenches: Resilience in Multiprotocol Era
DescriptionNow, chiplets aren't just any building blocks; they're like the superheroes of the semiconductor world. By promising the adaptability and scalability compels a need for a cost-effective and time-efficient approach to super architecture testing. Thus, demanding sustainability of the overall design verification process.
Our paper unveils a state-of-the-art modularized architecture that accommodates multiple protocols, seamlessly overlaid onto the UCle framework. This can be tailored to suit a variety of design verification topologies, adapting to the unique needs of each project.
The vision is simple: Chiplets, whether from today or tomorrow, should seamlessly integrate into a cohesive whole.
Our paper unveils a state-of-the-art modularized architecture that accommodates multiple protocols, seamlessly overlaid onto the UCle framework. This can be tailored to suit a variety of design verification topologies, adapting to the unique needs of each project.
The vision is simple: Chiplets, whether from today or tomorrow, should seamlessly integrate into a cohesive whole.
Event Type
Engineering Track Poster
TimeTuesday, June 255:15pm - 5:15pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP