Presentation
Implementing World's First Fully Integrated SoC Solution For Direct-To-Satellite IoT Connectivity
DescriptionThis paper explores some of the challenges encountered during the digital implementation of the world's first fully integrated SoC solution for Direct-to-Satellite IoT connectivity chip. The chip is a mix of analog and digital sections and was implemented in GF 22nm process node. Due to the stringent application requirements, the digital design involved special planning of the power grid to address IR, and a macro placement to support an odd shape block. Moreover, very tight clock latency was required to meet the timing metrics. Careful considerations to the floorplanning became important to mitigate congestion, especially with the limited number of metal layers and the special power grid. The engineering team had to meet a tight tapeout timeline, which meant there was not a lot of time to do full-flow iterations. We had to focus on choosing the optimal floorplan with P&R results at the placement stage, and therefore finding a tool that correlated very well between post placement, post route and signoff, was key to drive this project to completion.
Event Type
Engineering Track Poster
TimeTuesday, June 255:37pm - 5:37pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP