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Design Closure Methodology using stage wise checkers by Ease of Review to minimize Physical Design Implementation & Closure TAT
DescriptionAn efficient and effective methodology for an overall turn around time reduction during physical design implementation phase of SOC Design. This has been implemented via automated stagewise checkers and ease of review dashboard. The smooth and ease of project execution involves data gathering during initial design planning. The idea is to closely inspect the QOR of every physical design implementation stage and rework to achieve the best possible results before passing on to next stage.
This would help in easy design closure at final stage and effectively reduce the huge runtimes usually seen towards the last stages as more and more design components starts stacking up on the SOC.

The problem or pain point has been correctly identified, and the proposed solution is capable of producing the desired outcomes. The stagewise data can be viewed in a user-friendly dashboard which further simplifies the tracking and review process. Further eliminating the scope of human error. During initial design phase working with dirty data would lead to multiple check failures which can be reviewed and waived initially, but the same need to be attended during final closure. All this is pretty well captured and tracked. The dashboard is quiet helpful in reviewing final design closure. It clearly gives the reviewer what all as passed/failed/waived at different stages. All the waivers have the justifications along with approver details.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Topics
Back-End Design
Embedded Systems
Front-End Design
IP