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Areal and Time Decomposed Phalanx based Dynamic IR-Drop Prediction using DNN(Deep Neural Network) at Earlier stage of Design cycle
DescriptionAs the semiconductor technology has been increased, a lot of challenges related to IR-Drop have been increased considerably in recent years. Especially Dynamic IR-Drop issue becomes a bigger factor resulting in function failure and this will be true for advanced process node below 5nm and smaller. We need post-VCD files having various actual scenarios to find out if there are IR-Drop issues or not. But this post-VCD files can't be available until the end of design cycle and this is too late to fix out IR-Drop issues. It's very time consuming, painful and sometimes almost impossible to fix out at the final stage of design cycle when the post-VCD files can be obtainable.

The only to resolve this situation is to find out where is weak to dynamic IR-Drop as earlier as possible and that's why we have proposed the Areal and Time decomposed Phalanx based DNN(Deep Neural Network) methodology. Using this methodology, we have chosen Phalanx which is most similar to DNN modeling and predicted IR-Drop at the new design. We have found out where is weak at PDN(Power Distribution Network) even without layout routing information which is essential in the traditional flow and can fix out issues and strengthen PDN at the very earlier stage of design cycle with this methodology.

This method shows a IR-Drop accuracy over 95% and reduced a lot of iteration time to fix IR-Drop violation by 40% or so.

This Areal and Time decomposed Phalanx based DNN methodology has been verified using commercial tool, Cadence Voltus.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Topics
Back-End Design
Embedded Systems
Front-End Design
IP