Presentation
Quality Assurance of DRC deck for Devices by SKILL Automation
DescriptionThe quality of the Process Design Kit (PDK) is crucial for the success of any System-on-Chip (SOC) for any organization. Design Rule check is one of the mandatory checks in the sign-off process of a SOC or an IP. The QAcell methodology involves exhaustively creating small layouts representing the violating and legal configurations to verify the alignment of the Design Rule Check (DRC) deck with the Design Rule Manual (DRM) separately for each rule, including Device Rules. To increase the productivity , SKILL automation can automate the design of layout test cases (QAcells) for device rules. The automation allows quick and easy customization of complex devices and layouts with varying CDF parameters. This automation reduces the validation engineer's time by 3x for validating each rule separately. The combination of the QAcell methodology and SKILL automation provides an efficient approach to verifying the quality of the DRC deck for Device Rules. The result is a faster and precise validation methodology.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP