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Modeling Optimal Number of Tap-points for Flexible H-tree During Clock Tree Synthesis
DescriptionClock tree synthesis is the process of connecting the clocks to all clock pins of sequential circuits by using inverters or buffers in order to balance the skew and minimize the insertion delay. There are multiple techniques available for clock distribution. Some of these methods include the single clock tree, multi-tap clock tree, clock mesh, and Flex H-Tree.

Flex H-tree is a sophisticated methodology for clock distribution that maintains electrical symmetry but is flexible in geometrical symmetry. It helps in achieving the minimum skew in a clock tree, relaxes the requirement to be geometrically symmetric, and automates synthesis even in floorplans with placement restrictions.

FlexH-Tree enables users to make smart latency vs. timing trade-offs. The classical problem that designers face while building FlexH-Tree is the selection of the number of tap points.
There are an infinite number of combinations for tap-points.

This paper provides a noble approach to determining the optimal number of tap-points per clock library cells.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Topics
Back-End Design
Embedded Systems
Front-End Design
IP