Presentation
Machine Learning-based feasibility estimation of digital blocks for improved productivity in Analog-on-Top Back-End design flows
DescriptionAnalog-on-Top Analog Mixed Signal (AMS) Integrated Circuit (IC) design is a time-consuming process predominantly carried out by hand. Within this flow, usually, some area is reserved by the top-level integrator for the placement of digital blocks. Specific features of the area, such as size and shape, have a relevant impact on the possibility of implementing the digital logic with the required functionality. We propose an automated evaluation methodology to predict the feasibility of digital implementation based on a set of high-level features avoiding time-consuming Place-and-Route trials so to provide fast feedback between Digital and Analog Back-End designers during top-level placement.
Event Type
Engineering Track Poster
TimeTuesday, June 255:33pm - 5:33pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP