Presentation
Dashboard Model for Foundry Early Node Assessments using Synopsys Design.da
DescriptionWith the increasing complexity and size reduction of System-on-Chips (SoCs), evaluating diverse design rules becomes crucial in early-stage Design-Technology Co-Optimization (DTCO) and initial Performance, Power, and Area (PPA) assessments.
In response to these challenges, this paper presents a novel approach for detecting workflows at early nodes, specifically tailored for Samsung Foundry. This task is relatively straightforward for experienced engineers but poses challenges for beginners, leading to time-consuming and error-prone processes.
This innovative workflow leverages DesignDash, an advanced data visualization and machine intelligence-based design optimization solution by Synopsys. DesignDash facilitates efficient data collection and visualization.
The proposed early node DTCO/PPA workflow focuses on problem detection, outlining key parameters to assess when conducting an evaluation. In the initial stages of Foundry projects, various issues can arise in design kits (DK), technology files, libraries, and enablement tools, such as Fusion Compiler (FC). Addressing these challenges swiftly is imperative to shorten the schedule required for PPA forecasting.
The workflow enables engineers to assess the feasibility of library cells and implementation flows through floor-planning, placement and routing analysis. By consolidating checklist items and providing actionable insights, this approach enhances visibility and significantly reduces turnaround time.
To further streamline the process, a customized interface is integrated into the existing DesignDash framework, empowering users to swiftly identify and address issues.
This paper not only presents an optimized workflow for early node DTCO/PPA but also emphasizes the importance of knowledge sharing, encouraging the exchange of success stories.
In response to these challenges, this paper presents a novel approach for detecting workflows at early nodes, specifically tailored for Samsung Foundry. This task is relatively straightforward for experienced engineers but poses challenges for beginners, leading to time-consuming and error-prone processes.
This innovative workflow leverages DesignDash, an advanced data visualization and machine intelligence-based design optimization solution by Synopsys. DesignDash facilitates efficient data collection and visualization.
The proposed early node DTCO/PPA workflow focuses on problem detection, outlining key parameters to assess when conducting an evaluation. In the initial stages of Foundry projects, various issues can arise in design kits (DK), technology files, libraries, and enablement tools, such as Fusion Compiler (FC). Addressing these challenges swiftly is imperative to shorten the schedule required for PPA forecasting.
The workflow enables engineers to assess the feasibility of library cells and implementation flows through floor-planning, placement and routing analysis. By consolidating checklist items and providing actionable insights, this approach enhances visibility and significantly reduces turnaround time.
To further streamline the process, a customized interface is integrated into the existing DesignDash framework, empowering users to swiftly identify and address issues.
This paper not only presents an optimized workflow for early node DTCO/PPA but also emphasizes the importance of knowledge sharing, encouraging the exchange of success stories.
Event Type
Engineering Track Poster
TimeTuesday, June 255:00pm - 5:00pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP