Presentation
Reset Domain Crossing Design Verification Closure using Advanced Data Analytics Techniques
DescriptionThe modern SoCs are equipped with complex reset architectures to meet the low-power and high-performance requirements. Multiple reset domains in a design can cause reset domain crossing (RDC) issues when data from one asynchronous source reset domain propagates to either a different asynchronous, synchronous, or no-reset destination domain. The data generated by the RDC verification tools is very large, consisting millions of RDC paths. The analysis of this data is a very time consuming and challenging task for the design and verification engineers, that often involves many iterations. In this paper we will highlight how we can automate the RDC results analysis using data processing and data analytics techniques to provide faster RDC verification closure.
Event Type
Work-in-Progress Poster
TimeTuesday, June 256:00pm - 7:00pm PDT
LocationLevel 2 Lobby
AI
Autonomous Systems
Cloud
Design
EDA
Embedded Systems
IP
Security