Presentation
Scalable modeling of dynamic voltage compression on timing
DescriptionOn leading node designs, we see power supply integrity becoming more important and meeting the dynamic compression requirement becomes more difficult. We can use various techniques to fix local hotspots, but these techniques can be time consuming and iterative. Analyzing the power supply effect on timing analysis can be computationally expensive. To maintain schedule, we may need to leave some violations unfixed and model additional timing uncertainty on instances which violate. We used various techniques to model this and found only minor impacts. By allowing a small number of violations to be waived, we were able to improve the schedule.
Event Type
Engineering Track Poster
TimeTuesday, June 255:30pm - 5:31pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP