Presentation
Automated Place and Route based solution for Custom Blocks
DescriptionMost SoCs today have analog or mixed signal blocks, such as SerDes cores, DACS, ADCs, PLLs and other transceivers. Many analog blocks have digital control logic. As such, an increasing amount of analog IP is mixed signal, and with rapidly increasing SoC capacity, a single IP block might represent an extremely complex mixed signal function. Currently, a sizable part of mixed signal design implementation is done manually, which is a slow and laborious process that can lead to design errors and numerous iterations. The blocks are placed and routed using semi-manual process, without the aid of design rule-correct automation. In this paper, we introduce a methodology to automate the placement and routing of such digital/mixed signal blocks with LVS and DRC awareness. Within a few clicks the digital block is placed and routed with the addition of boundary cells, tap cells and fills. The solution is capable to read user constraints and enhance quality of routing.
Event Type
Engineering Track Poster
TimeMonday, June 245:00pm - 6:00pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP