Presentation
Solving the antenna debug challenge in physical design verification
DescriptionDesign teams find it increasingly challenging to debug antenna violations, especially at
advanced nodes, due to increasing complexity in antenna rules. Antenna rule checks may
contain multiple scenarios with different conditional constructs, which make it difficult
for engineers not only to distinguish which equation has been used for calculating the
failure, but also how to fix the issue. They typically rely on multiple runs or a trial-and-
error method to fix the antenna violations, both of which are inefficient, time-consuming
solutions.
We present an innovative antenna debugging flow that calculates the exact number of
diodes that should be added to fix antenna errors in a single run. Given the required diode
area that should be added to fix an antenna violation, as well as the option to categorize
violations by net, designers can now resolve antenna errors accurately and efficiently.
advanced nodes, due to increasing complexity in antenna rules. Antenna rule checks may
contain multiple scenarios with different conditional constructs, which make it difficult
for engineers not only to distinguish which equation has been used for calculating the
failure, but also how to fix the issue. They typically rely on multiple runs or a trial-and-
error method to fix the antenna violations, both of which are inefficient, time-consuming
solutions.
We present an innovative antenna debugging flow that calculates the exact number of
diodes that should be added to fix antenna errors in a single run. Given the required diode
area that should be added to fix an antenna violation, as well as the option to categorize
violations by net, designers can now resolve antenna errors accurately and efficiently.
Event Type
Engineering Track Poster
TimeTuesday, June 255:08pm - 5:09pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP