Presentation
DVD-aware STA and its silicon correlation results on 10nm test chip
DescriptionAs technology scales down, metal resistances have increased, resulting in potentially more voltage drop. Therefore, Dynamic Voltage Drop (DVD) significantly affects performance in recent process technologies. Moreover, transistor density has increased, resulting in higher power density. Thus, power integrity and timing check must be done simultaneously. In this work, DVD-aware STA flow based on Cadence's Tempus PI is proposed. To show its effectiveness on real silicon, the proposed method is evaluated by correlating with 10nm test chip that is specially designed for DVD-aware STA and implemented in Samsung's 10nm process.
Event Type
Engineering Track Poster
TimeTuesday, June 255:17pm - 5:18pm PDT
LocationLevel 2 Exhibit Hall
Back-End Design
Embedded Systems
Front-End Design
IP