Presentation
Power Your Future: Investments for the Chip Design Workforce and Research
DescriptionDeloitte predicts that the semiconductor industry will face a significant gap in workforce, with over 1 million additional jobs needed by 2030. Workforce development is critical, especially chip design talent (including logic and circuits, design verification, testing and CAD, and embedded software), an area that is typically overlooked but is a keystone in the semiconductor supply chain and is essential for technological advancement. The growing demand for design engineers is fueled by industry's emphasis on custom silicon and the realization that any advancement in software is enabled by hardware. This panel will address workforce development success, barriers, critical research areas, and government funding opportunities for cross sector collaborations to ensure a resilient chip design workforce with a focus on the following:
- Fundamental Research: Unprecedented demand and development of semiconductors demonstrates an opportunity to drive system-level performance improvements in computing. What are some strategies to cultivate research capabilities to address the next grand challenges in chip design and innovative ways to nurture PhD talent?
- Student Attraction & Retention: How do we enhance awareness about chip design to attract diverse talent? What strategies and resources can be implemented to build early excitement around a career in chip design and address the leaky talent pipeline through retention/retraining initiatives?
- Training & Education: What are the best ways to strategically incorporate IC design in early education? What programs or methods can be developed to enable our educators?
- Building Infrastructure: How can we overcome barriers like costly cloud services and fabrication resources to make educational infrastructure more accessible? What are some strategies to promote collaboration in education while centralizing, scaling and subsidizing infrastructure?
- Fundamental Research: Unprecedented demand and development of semiconductors demonstrates an opportunity to drive system-level performance improvements in computing. What are some strategies to cultivate research capabilities to address the next grand challenges in chip design and innovative ways to nurture PhD talent?
- Student Attraction & Retention: How do we enhance awareness about chip design to attract diverse talent? What strategies and resources can be implemented to build early excitement around a career in chip design and address the leaky talent pipeline through retention/retraining initiatives?
- Training & Education: What are the best ways to strategically incorporate IC design in early education? What programs or methods can be developed to enable our educators?
- Building Infrastructure: How can we overcome barriers like costly cloud services and fabrication resources to make educational infrastructure more accessible? What are some strategies to promote collaboration in education while centralizing, scaling and subsidizing infrastructure?
Moderator
Event Type
Research Panel
TimeWednesday, June 261:30pm - 3:00pm PDT
Location3014, 3rd Floor
EDA