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Session

Back-End Design: Thermo-Electrical Analysis and Signoff Engagement for Robust Performance
Session Chair
Amol Joshi
Intel Corporation
DescriptionDeliver a successful solution teaser by learning about ways to model the double helix of thermo-electric impacts on system design closure for timing, power supply delivery and test
Event TypeBack-End Design
TimeTuesday, June 2510:30am - 12:00pm PDT
Location2008, 2nd Floor
Topics
Back-End Design
Design
Engineering Tracks
Presentations
10:30am - 10:48am PDTA Methodology to Predict IR Drop Enhancement in BSPDN Compared to FSPDN by Formulating the On-Die IR Drop
Presenters
Dean Huang
Andy Wei
Hank Wang
Odie Ou
10:48am - 11:06am PDTEfficient representation of cross current effects in contributor-based power models
Presenters
Spandana R
Arun Joseph
Nagu Dhanwada
Rahul Rao
11:06am - 11:24am PDTTiming Robustness: A Way forward for analyzing timing-voltage sensitive paths for accounting IR-Drop Variations
Presenters
Shourya Shukla
Lavanya Padmanabhuni
Sainarayanan Suryanarayanan
Harshit Jaiswal
Sharath AC
Nitin Jain
11:24am - 11:42am PDTReducing Test Dynamic IR and Vmin for Automotive and Industrial Radar SoCs using Power Aware DFT Methodology
Presenters
Nitesh Mishra
Rupesh Lad
Hrithik Sahni
11:42am - 12:00pm PDTAutomated Workflow for Comprehensive Thermal Analysis of IC Package Designs
Presenters
Sharath C R
Senthil Kumar Sundaramoorthy
Siva Gurrum
Blake Travis