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Organization

Ansys
Contributors
Ahsan Alam
Naveen B
Prith Banerjee
Prith Banerjee
Murat Becer
Norman Chang
Sreeja Chowdhury
Luca Cui
Ed Deeters
Vyom Garg
Rich Goldman
Yongsheng Guo
Amit Jangra
Amit Jangra
Koshy John
Sooraj JP
Akhilesh Kumar
Lang Lin
Zeqin Lu
Rodger Luo
Sreekanth R
Sreekanth Rajan
Sreekanth Rajan
Godwin Rajasekhar
Chidambaram Rakkappan
Sankar Ramachandran
Veshal Sridhar
Jerome Toublanc
Mallik Vusirikala
Xiaomei You
Xiaomei You
Muhammad Zakir
Ran Zhang
Shuqiang Zhang
Wen-liang Zhang
Chang Zhao
Li Zou
Presentations
Engineering Track Poster
A "Shift-Left" Analysis Flow For Layout Parasitics Of High Speed Analog Mixed Signal Design
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
A Closed Loop IR and Timing Comprehensive Co-Signoff Methodology
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
A Novel Approach to Cost-Efficient Hybrid Cloud Solutions with SeaScape's Data Lake and Micro-Resiliency
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
A PVT-robust Design with Electronic/Photonic Co-simulation Engine for Microring-based DWDM 3-D Silicon Photonics
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Achieving High Local Noise Coverage in Dynamic EMIR Analysis using SigmaDVD
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
AI-Enhanced Automated Optimization Workflow for HBM Interconnect on Interposer
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
An Effective Method of Evaluating Chip Power Noise in System-level with iCPM
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
An Efficient Early Thermal Management Solution in 3DIC design
Back-End Design
Embedded Systems
Front-End Design
IP
Back-End Design
Design Automation Advancement in the Analog Domain
Back-End Design
Design
Engineering Tracks
Engineering Track Poster
Die-Level Dynamic-IR Analysis Shift-Left Enabled by RedHawk-SC SigmaDVD
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Electromagnetic Solutions From Design to Sign-Off Stage For High-Speed SerDes Design
Back-End Design
Embedded Systems
Front-End Design
IP
Exhibitor Forum
Leveraging AI/ML for Electronic Design and Simulation
Engineering Track Poster
Machine-Learning-Driven Floorplan-Aware Power Delivery Network Co-Planning
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Next-Gen comprehensive IR analysis with Ansys SigmaAV
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Novel Preprocessing Technique for Data Embedding in Engineering Code Generation Using Large Language Models
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Novel Way of Checking and Analyzing Peak to Peak Voltage Variation Challenges for High Computational Multiprocessors SOC
Back-End Design
Embedded Systems
Front-End Design
IP
Back-End Design
Pre-Silicon Photon Emission Modeling and Optical Side-Channel Simulation
Back-End Design
Design
Engineering Tracks
Engineering Track Poster
Redefining Hierarchical Power Integrity signoff for Ultra-Large System-on-Chips
Back-End Design
Embedded Systems
Front-End Design
IP
Engineering Track Poster
Shift-left Solution for Enhancing Power Integrity in physical design construction with RedHawk-Fusion
Back-End Design
Embedded Systems
Front-End Design
IP
Back-End Design
Si Backside Side-Channel Leakage and Simulation of Cryptographic IC Chips
Back-End Design
Design
Engineering Tracks
Engineering Track Poster
SigmaDVD: High Coverage Solution for Power Integrity Signoff
Back-End Design
Embedded Systems
Front-End Design
IP
Exhibitor Forum
Understanding SigmaDVD – Ansys’ Radical New Methodology for Voltage Drop Signoff
Exhibitor Forum
Visualizing the Future of Multi-die Design with Ansys & NVIDIA Omniverse
Research Panel
Why Is EDA Playing Catchup to Disruptive Technologies Like AI? What Can We Do to Change This?
AI
EDA